This disclosure relates generally to semiconductor device fabrication, and more particularly to fin structure formation including partial spacer removal for formation of a semiconductor device.
Field effect transistors (FETs) are used to make semiconductor chips for various applications, such as application specific integrated circuit (ASIC) chips, microprocessor chips, and static random access memory (SRAM) chips. Complementary metal-oxide-semiconductor (CMOS) processing technology is used to form FET devices.
Technology advances have scaled FETs on semiconductor chips to increasingly small dimensions, allowing power per logic gate to be dramatically reduced, and further allowing a very large number of FETs to be fabricated on a single semiconductor chip. However, scaling of FETs runs into physical limitations. Gate oxides have become thin enough that leakage occurs through the gate oxides. Further scaling of gate oxide thickness may cause an exponential increase in leakage. Power dissipated by leakage currents has become a significant portion of total chip power, and an exponential increase in leakage results in unacceptable power dissipation for many types of chips.
A finFET is a type of FET device that utilizes three dimensional techniques to pack a large number of FETs in a given area of a semiconductor chip while reducing some of the problems described above. A finFET may include a relatively tall, thin semiconductor fin structure comprising a semiconductor material. Formation of a finFET fin structure may include forming mandrels on a substrate, forming spacers around the mandrels, removing the mandrels, and etching the spacer pattern into the substrate to form the fin structures. A cut mask may then be applied to the fin structures to remove any portions of the fin structures that are undesired in the finFET device. However, application of a cut mask to the fin structures may have a relatively small margin of error, and misalignment of the cut mask to a fin structure that is being removed may lead to undesired cutting of adjacent fin structures.